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Re: The min start volatge of ADP1046 uTCA EVB

Hi NC, if the output is 5V, you do not need to change the turn ratio of the transformer. you just need to change the inout UVLO thresohld and output voltage divider. i will send you the register...

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How to convert dBFS scale to dBc

Hello,The datasheet says that SFDR of AD9467 is 92 dBFS at 170 MHz at 250 MSPS at -1 dBFS.I need to compare AD9467 to other ADC which SFDR is described as dBc. The unit is different-one is dBFS,...

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ADP5050 Eval Board Setting Issue

Hello, I have bought the ADP5050 Eval board and install the ADI SDP drivers already. But there is something wrong with my devide manager as compared with the user manual in page 4 figure 9. It doesn't...

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Re: How to convert dBFS scale to dBc

Hi, Please see figure 2.54 in the link belowhttp://www.analog.com/library/analogDialogue/archives/39-06/Chapter%202%20Sampled%20Data%20Systems%20F.pdf This figure gives the relationship between dBc and...

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Re: Error while builing compiling buildroot

Hi Lalitha, I guess something is in mess but I can't tell immediately what they are, in this case I would recommend you to start from a clean version, by following buildroot:build-system:build_a_target...

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Re: AD790, temperature considerations

usaghi-san, The problem is finding a new part that runs on +/-15V and is in a PDIP;  there aren't any.Look at the AD8469, AD8468, ADCMP609 or ADCMP608.  You can get little adaptor boardsfrom...

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Re: Error while builing compiling buildroot

Hi Aaronwu     I was able to build buildroot 2012 version with the same configuration. Why I wanted to build 2013 version is that I want to use USB camera.

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How to do a QPSK modulation and demodulation in zedboard with ad9361

Hi,everyone, i need to do a qpsk modulation and demodulation in zedboard using HDL,Have someone done it or can me give some advices?Any helps is appreciated.Thanks.

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ADXL345 characterization data at 3.3V power supply is available?

Dear Sir,I have a question regarding ADXL345 operation voltage. It specifies2.0 V to 3.6 V.In the datasheet, ADXL345 is tested and specified at a supply voltage of VS = 2.5 V; however, it can also be...

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Re: AD7631: Increase in Noise Floor - Bcoz of Read/Write(Digital...

Hi, Jebas. It should be noted that to meet all timing requirements, the SPI clock should be limited to 17 Mbps allowing it to read an ADC result in less than 1 μs. You should not be worried about...

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Re: AD9361 AGC FAST ATTACT MODE

Dear sir :Thanks for your reply.There are still some problems:1.If the receive signal is noise ,due to its low power ,it will go to state 2(low power)-> state2A(increase gain)   so it will finally...

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Re: Re: AD9361 VCO calibration lock

 thx tlili ! I check my settings again.My lock detector register(0x28A, TX) D3:D0 is 1110 which means lock detect time is 2048 reference clock cycles and run lock detect continuously. My work mode is...

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Re: port uboot on custom board based on bf548-ezkit(new bee)

Hi Aaronwu,   One more thing missing ,I find a tiny bug in uboot-2013R1 , file:drivers/mtd/spi/spansion.cin definition :                    static const struct spansion_spi_flash_params...

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Re: Error while builing compiling buildroot

Hi Lalitha, follow FAQ Use the ADI test scripts to auto config and build a target for a set of function is a good idea to bring up your USB camera function, you would need the scripts in...

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Flyback solutoin

Hi there, I'm looking for a Flyback solution.Does ADI have any solutions about it?[Here is the condition]Input voltage is 24Voutput voltage is 5VIout=0.5ABOM size and Minimaizing board area is...

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Re: EVAL-ADV8003 OSD Entry Point?

Are you using EVAL-ADV8003-SMZ or EVAL-ADV8003-SMZ-P? Have you experimented with programming your board with the application binary and OSD binary we recently posted on EngineerZone? -Matt

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Re: port uboot on custom board based on bf548-ezkit(new bee)

Hi Tricky, thanks for sharing this information, I would recommend you to submit a patch for this bug directly to u-boot upstream at WebHome < U-Boot < DENX. Or you can share me datasheet of your...

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AD9681 /Synchronization of output clock of BANK1 and BANK2

Please teach me AD9681.AD9681 has 2 data clock(BANK1,BANK2) and 2 frame clock(BANK1,BANK2). Are two BANK the operation of the asynchronous system?Has the data clock of BANK1 and BANK2 synchronized?Has...

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Re: adv7182 configuration for NTSC input

I have capture code where it will shows the active video pixel.When i give PAL input , im getting proper resolution (720x288) for each field and output display also proper.Any setting required for NTSC...

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Re: ADV7630 36bit Deep Color

Hello, Thank you for advice.I solved the problem. Regards,

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