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Re: Re: AD9361 VCO calibration lock

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thx tlili !

 

I check my settings again.

My lock detector register(0x28A, TX) D3:D0 is 1110 which means lock detect time is 2048 reference clock cycles and run lock detect continuously.

 

My work mode is FDD and it needs accurate and long calibration before operation based on the Calibration Guide.pdf

I use a given setting(a row in Table7 of AD9361_Calibration.pdf)

0x27d[7]0x289[6:4]0x289[3:2]REFCLKscalewait1(us)wait2(us)wait_alt(us)N_alcN_countcalibration time(us)
00340 MHz120.6501.000121024244.750

It do tells the calibration time is 244.750us.

Then I calculate the lock detect time. It is 51.2us --((1/40,000,000)*2,048)/1e-6 -- when the REFCLK is 40MHz within 2048 counts. It's much more shorter than the given calibration time. May this case the lock detector unlock? If so, how can I know my VCO lock?

 

THX ALL.


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