Hi Ehsan,
I also think that its fair to single out the AD9523-1 at this point. Since you are using a PLL1 feedback divider of 4 with both the 122.88MHz and 80MHz VCXO, can you run the standard driver to see if PLL1 locks with an external 20MHz REF input and 80MHz VCXO? I would expect to see PLL1 lock and PLL2 unlock since you will not be altering PLL2s N divider.
What is the 80MHz VCXO that you are you using? Can you list all of the status readbacks that you are seeing?
Regards,
Kyle