Hello Gnib,
Thank you for answer.
I am FAE of ADI in Israel, my costumer application is thermal imaging.
Today he use Linear Technology's A/D P/N LTC2387-16
What can I offer him as good ADIs A/D replacement?
Please Note: The costumer need this for new design .
Hi,
We have a custom board with AD9361 connected to another custom board with Zynq on it. I have ported the non-OS software and HDL cores onto the Zynq with some additional logic in the RX chain such as windowing and detectors. When I run the sotfware, during the digital interface calibration i.e., ad9631_dig_tune, the RX tuning passes but the TX fails with the message "TX tuning failed".
I have tried this modified HDL and non-OS solution on the standard zedboard-fmcomms4 (with AD9364) setup and everything works fine. Can someone help me in answering the below questions and/or suggest some debugging start-points?
We recommend that you use an HDMI generator during the early stages of development rather than consumer electronic equipment. Consumer electronic equipment (such as PC) can require EDID or HDCP and it is very difficult to tell what type of video or audio signal it will output. HDMI generator is much more deterministic.
-Matt
This sounds more like a question that should be posted on the AmCap site. Unfortunately I am unfamiliar with the program.
No, Most of our video ICs require some configuration to match the expected video format. Definitely injecting sound into an HDMI stream requires I2C interactions.
Also, I recommend that you configure the evaluation board with the software driver, rather than scripts. This will copy EDID data from the sink to the source.
-Matt
Dear Sir,
We now use AD7192 in our design. When we took this board to do EMC RS test(10v/m,100-200Mhz), the date range from 4.0pH to 4.35pH, failed to pass the test.
Below is my schematic, can you kindly suggest that do i need to modify several parts for better EMC performance?Seems we need to seperate the AVdd and Dvdd power supply.
Sorry for trouble you guys.
Hi Mugundhan,
We are not able to provide FPGA code development support for non ADI hardware platforms. You'll need to work with your 3rd party FPGA hardware tech support resources for that. I can provide a link to the AD9284 FPFA code that we distribute with the HSC-ADC-EVALCZ eval platform: ftp://ftp.analog.com/pub/HSSP_SW/fpga/AD9284_LVDS.zip in case that might be useful for comparison purposes.
Regarding your observation of suspected cross-talk from the terminated and un-driven AD9284 channel please provide details on how you were implementing the 50ohm Ain termination? By default, each AD9284 Ain is internally biased at a fixed DC level of 1.4V. These inputs are not intended to be terminated to GND. Unused Analog inputs can be left floating and they will self bias to a common internal common mode level. To force a 0V Ain the undriven Ain pair should be shorted together, never grounded, which insures a 0V differential: Ain+ = Ain- = 1.4Vdc. Please repeat your measurement and you should see the terminated Ain channels output sitting near midscale, and the driven Ain outputs operating with the expected digitized signal. The crosstalk between channels is specified at -80dBc on the AD9284.
Best Regards,
TonyM
Actually, how do I check the HPD line? With a oscilloscope or in software?
After you run the scripts and get everything working correctly.
1) toggle S3 and pull PORT B. does it still blink?
2) hold S2 down and pull PORT b, does it still blink?
I want to make sure the processor is not writing to the 7630.
If the processor is dead, then the ADV7630 should be running totally static
The only other thing I can think of is a mechanical issue with the board. Maybe the way you're pull the cable out flexes the board messing with the external Rext resistor or other components on the board..
Use a scope on the pin. Might be a be hard to get to but doable
Hi,
The application note, AN-1118, describes the calibration process. The actual ADE7953 will never directly display real world values, rather your controller (MCU) will have to read the registers from the ADE7953 and then use the constants you calculated to translate the register value into a real world value. For example, AENERGYA(dec) * Constant(Wh/LSB) = Wh.
Regards,
Dlath
We do not test the device at 1.8V DVDDio, therefore we have no data on how the device would operate. Even if it did work there the pixel bus output timing would be wrong since the drive voltage is lower.
Hi Godson,
Please try to keep your posts to only 1 discussion, posting in multiple places will not get a faster reply and actually makes the discussion much harder to follow. This has been answered in the following discussion: [ADE7953] refer to input LSB calculation.
Regards,
Dlath
Hi Godson,
Please try to keep your posts to only 1 discussion, posting in multiple places will not get a faster reply and actually makes the discussion much harder to follow. This has been answered in the following discussion: [ADE7953] refer to input LSB calculation.
Regards,
Dlath
Hi Kawa-san,
Thanks for the information regarding the issue you are experiencing.
A1) We have not heard of issues with EMC testing for this product in the past.
A2 & A3) We have not performed any EMC testing on this product and so we cannot provide any guidelines at this time as to how to solve this issue, this would require investigation before we could comment. Analog Devices do have the capability to perform this testing but any testing of this product would require a business justification.
Let me know if you wish to discuss the business justification for additional testing privately over email and I can contact you directly.
Regards,
Rob
Thanks so much Dlath. I'm grateful. I will keep to your advice.
3) When reading a 16 bit register - it seems like you need two 16 bit transmissions:
Byte 1 = R/W and Address
Byte 2 = 0
Byte 3 = First Register Byte
Byte 4 = Second Register Byte
my question is - do you need to de-select CS between the first two bytes and the last two? Or do you just keep reading? Can't find a definitive answer in the datasheet.
ANSWER: Your byte sequence is correct. This is a very old datasheet. After reviewing it, I have to agree that our newer datasheets offer better clarity on this point. If you are interested in a better description, please check out the ADIS16460 description, which uses as very similar SPI protocol to the ADIS16209.
http://www.analog.com/media/en/technical-documentation/data-sheets/ADIS16460.pdf#page=11
Back to your question. You do not have to raise the CS line between each 16-bit burst, but some have found that to be helpful in managing noise/emi influence on their interface.
4) If CS has to be deactivated between the address word and register word (in above) - how can you safe guard against the MCU and ADIS falling out of sync?
e.g if the ADIS is reset between the first two bytes and the second two the MCU will be expecting data whilst the ADIS is expecting the address word.
ANSWER: Raising the chip select line does not reset the SPI buffers inside of the device. It merely causes the ADIS16209 to let go of the SPI lines during the stall time.
Hi, I am currently using ADV7850 as my sink device for our HDMI1.4 spec coverage. But the requirement changed to HDMI2.0a. I would like to check if Analog has a direct replacement for ADV7850 for HDMI2.0a spec?