Re: ADP150 and capacitor choise
The schematic is somekind of "standard" and the quality depends of the used components I could make a demo PCB right now with e.g. an inductive coupling to feed the area with a RF-signal (getting wild...
View ArticleClik here to view.
Re: HMC833 power reduction with Doubler
Once locked on 3GHz with doubler off (-6.5 dBm output) check the frequency change to 3.5GHz follows the following sequence. I assume frac-n mode, 50MHz reference, R=1, autocal is on: Set VCO to 1750...
View ArticleUpdating AES-KCU-JESD-G in Vivado
Technical Goals require operating in latest Vivado and System Generator Versions. Need to update Analog Devices Ip to be compatible. Updated to Vivado 2016.4 MatLab 2016b Design KCU105-- IP Status...
View ArticleRe: Enabling AD9371 Rx through Linux Driver
I see, that makes sense. So it would be [Rx1-I, Rx1-Q, Rx2-I, Rx2_Q] as the first 8 bytes of the buffer? Meaning in a 4096 byte buffer, there would be 512 samples at a time?
View ArticleRe: overlay / virtual memory methods
Hi Miguel, yes it's an application for effect processing for guitars or instruments in general. Alex
View ArticleRe: Question on calculating Wh/LSB on ADE7953 active energy calibration
What does the signal input 500mV mean?what does " a dynamic range of 3000:1 means?how do I calculate the maximum current and base current for ADE7953?
View ArticleRe: I have an SDP-H1 connected to a eval-ad777 board; I want to connect to it...
Yes, correct. It may be that I simply need to use the ACE software. I am just getting started with these boards and simply want to acquire discrete ADC samples (anywhere from 10 seconds to 4 hours)...
View ArticleRe: AD1939 via Electret Mic Preamp Design
Excellent point about the phase shifting in the hardware - that would definitely introduce more complications! I'll utilize an FIR filter for each data stream. I'm thankful the T.I. preamplifier design...
View ArticleClik here to view.
Re: ADP150 and capacitor choise
As seen in the pre-design, I have the C4 on the top-layer and FB on the bottem-layer what is the same layer for the supply circuits. But it is an overthinking worth at which point the FB/C4 filtering...
View ArticleClik here to view.
Re: Trouble booting Linux on Mini-ITX with FMCOMMS4
I concur with Csomi. The latest commit appears to have worked here for me. The spdif and i2s resources are now mapped as expected. Here are the steps I took: git clone...
View ArticleRe: AD7621 problem with serial interface
Hi ir2017, Make sure you set SER/PAR to high. Can you share some screen shot on the SDOUT,SCLK,and other digital interface?To give us more view of the problem. Regards,Lloben
View ArticleClik here to view.
cf_axi_adc failing to probe on 0x80000000 failed with error -5
Trying to get the AD9361 working to Send and transmit but the cf_axi_adc driver is failing.[ 3.339512] ad9361 spi32766.0: ad9361_probe : enter (ad9361)[ 3.537103] ad9361 spi32766.0: ad9361_probe :...
View ArticleRe: About the STDI_INTLCD of ADV7441A
Thank you for your respond! I have read that forum post yet. I think I met the similar problem. Now, I just use continuous STDI mode to get INTLCD, and one-shot mode to get ohter four params. That will...
View ArticleAD9361 RSSI weight computation
Just saw there is an update on RSSI weight computation drivers/iio/adc/ad9361: Fix RSSI weight computation · analogdevicesinc/linux@a8201cf · GitHub Can you explain little more about this fix? Do I...
View ArticleClik here to view.
hmc1033,please help me, thanks
I configuration my hmc1033 board with the procedure,generation 500MHz clock: HMC1033_Write(0x0A,0x2006); //reg A HMC1033_Write(0x08,0xC1BEfF);//reg8 HMC1033_Write(0x0F,0x81); //reg f...
View ArticleHow to connect a 3.3V LVCMOS clock (single-ended) to ADCLK944 input?
I am use a 3.3V LVCMOS clock (single-ended) connect to ADCLK944 input. The ADCLK944 datasheet said "The input can accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS,...
View ArticleClik here to view.
ADV7611 12BIT SDR ITU BT656 Mode 2
Dear my friends,I'm using amcap to capture adv7611 output video.It's fine to acquire video when adv7611 works in 16 bit SDR ITU-R bt656 4:2:2 mode 0,Since the video source inupt to adv7611 is 12bits...
View ArticleRe: Video is distorted after some days in Encoder ADV7340
Hi,Do you have any update on the follow up questions?Can you able to resolve the problem?Best Regards,Jeyasudha.M
View ArticleRe: Regarding AD9361
Hello Anki, To my knowledge, we don't enable the HDL IQ correction block in the fmcomms2/3/4 reference design.The HDL provides support for it and it can be controlled through the ADC Channel registers...
View ArticleRe: Low maximum Tx output power
In attachment is schematic of Tx output structure. On scheme balun is 5400BL15B050, but in real it is 1850BL15B050S.
View Article