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Re: AD9361 AGC configuration

Thanks Michael,I wanted to modify the various thresholds on the go from my c application . I'll go through the details given by you. Thanks.

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multiple adau1761 interface zedboard

Hi, looking at the zed_adau1761 driver in Linux, is there a restriction in the number of adau1761 codecs to be used? Can i use 6 adau1761 using the Linux driver?Is this modification sufficient (It...

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Re: ADUM5422 Footroom voltage at unipolar supply

Hello msamera,Sorry for the wrong title/tag :-) For the time being I don’t have any prototype, I am in the design and specification phase. To point out my aim:The DAC is part of a control loop, so I...

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Re: AD5754R DAC ISsue with STM32F3xx

It's look like as if my first word for the range selection is never read and the default 5V range sets!

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Re: AD9625-2.5EBZ Poor Performance

Hi Christopher- One additional suggestion is to please be sure that you are using the default Visual Analog 'canvas' as the starting point for your data analysis of AD9625.  This can be found by...

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Re: BF518 problem with UART in DMA mode

Hi, I see a breaking interrupt and a framing error. There must be a reason for this...Something goes wrong here which may cause the Blackfin not to fetch the one word (in the wrong frame) which you miss.

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Re: Streaming with AD9361

Hi, Ok, glad to see it got solved. Yes, the TX support is a newer addition. When you say the registers in 0x400 to 0x440 are always zero does this mean that the other registers are not? - Lars

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Re: multiple adau1761 interface zedboard

Hi, If you want to instantiate more than one of the soundcards the mentioned fix is sufficient. It allows for an arbitrary number of sound cards. - Lars

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Re: Modifying HDL Design, FMCOMMS5 and ZC706

Hi, For the throughput the limit is pretty much the AXI HP interconnects on the ZYNQ. The AXI-DMAC itself is capable of transferring one word per clock cycle continuously as long as the destination is...

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Re: AD7291 Temperature reading not stable

Activating "Noise-delayed" bit I have same behavior.      bus.write_word_data(addr_v, 0x00, 0xA000) any hint will be really appreciated. Best regards GuiX

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Re: Modifying HDL Design, FMCOMMS5 and ZC706

So what about the PL design of collecting from different AXI-streams, can Xilinx interconnects be used? And then how to solve/split this in the libiio layer ?

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Re: Modifying HDL Design, FMCOMMS5 and ZC706

Hi, If those are separate sources and you want individual control over them you'll need one DMA controller per source. You can then use a AXI interconnect to connect the DMA controllers to the same HP...

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Re: flash programming problem

Hi Craig, I've a look at BF548 flash programming/ Burst example but I don't know what's its functionality. I've added a LED blinking snippet. However, I load the driver using flash programming utility...

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Re: 1920*1200@75Hz RGB ADI have solution?

Hello, There are no current plans for an industrial temp solution. Dave

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ADV7630: How to TMDS PLL reset

Hi all Does ADV7630 have the "TMDS PLL Reset "register who is similar to AD7842?Please refer to "2.2.8 TMDS PLL Lock" of "ADV7842_Recommended_Settings_Rev2.0.pdf" Page 8.  More information below.  We...

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Problem for ADV7343

Hi, we got two problems when using ADV7343 for video encoder (the output is video in form of PAL). Attached please find our design; we have ten of the same custom hardware using the same design, among...

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Re: ADV7630: How to TMDS PLL reset

Hi all I attached register dump data  of OK and NG.[attached:150121_RegisterDiffData.xlsx]

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Re: HMC-ALH444-SX and HMC-ALH444 difference

Hello Kagan,Thanks a lot for a help!

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Re: ADV7180 and ADV7393 -2

Hi I am in trouble as my customer is getting angry with no response.A few days have passed already.I want your comment with this matter. Best Regards,

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Re: ADE7878 Evaluation Board - Beginner

Hi, After debugging the above code I saw via oscilloscope that I am able to send 0x02 to CONFIG2 register. But while trying to read it back (to make sure write was successful) I am not getting any...

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