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Re: ADXL345, 3200Hz Data Ready makes ideal time interval?

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Venkat: Why they did not write down the variance data rate in datasheet

 

I wonder the variance occurred from clock source or latency while I do something in ISR(data ready).

If originally it is from clock source, data rate can be vary also while I use FIFO control?

 

Best regards,

Jiwon


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