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Re: Interfacing PS and PL (streaming data from PS to PL)

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Tarik:

 

Alot of it depends on at what datarate you want to send things out. The DAC (AD9122) on the FMCOMMS1 is capable of being fed at  16-BIT, 1200 MSPS, for I and Q. That's over 4800 Mbytes/second. That is too much for most Xilinx baseboards.

 

There is no "generic" solution, since there is no generic use case -- each is specific to each person, and sometimes you need to figure out what steps to do.

 

On other boards - like FMCOMMS2/3/4/5 which use the AD9361, the datarates are much lower, so DDR can keep up, and we do provide generic solutions.

 

-Robin


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