Hi Kris:
I strongly recommend that you include these details in a new revision of the chip's datasheet.
If you take a look at page 8, section "Chip Select":
" The AD637 includes a chip select feature that allows the user to decrease the quiescent current
of the device from 2.2 mA to 350 μA. This is done by driving CS, Pin 5, to below 0.2 V dc. Under
these conditions, the output goes into a high impedance state. In addition to reducing the power
consumption, the outputs of multiple devices can be connected in parallel to form a wide bandwidth rms multiplexer. "
Where it says output, I guess it refers to RMSOUT pin (the chip has 3 outputs). I've measured that BUFOUT pin is connected to negative supply through an internal equivalent 10K resistor, (which sinks current from ground taken through the load resistor). In this case, there is no floating voltage (hard -7,5V) and no high impedance, so in consequence there is no decrease in power consumption. Designers should be aware that if they pretend to use the internal buffer, CS pin should not be used. These features can't work properly simultaneously in every case. It depends of the chip's external circuitry.
Unfortunately, we already manufactured many 4 layer boards with this circuit and it can't be changed. My main idea during the design process was to use CS pin in order to avoid using an external analog switch. Other solution we tried was to use a pull down resistor in RMSOUT and an external buffer for the 2nd order filter. It implies track cutting, wire-wrapping and many changes so it’s still being considered. I’m afraid I have to say I feel disappointed by this product.
Thanks for your help.
Ed