1) Yes, all grounds are connected together. FOr good layout make sure you have a solid ground under the part with good routing so digital signals and their returns path do not cross the DAC outputs
2) PSAVE = 0 turns off DACs
3) PSAVE pull-up current is just the current needed to guarantee the device comes out of power save mode. A 10K pull-up would work fine
4) Vref pin current is not defined. It is best to use the zener diode as shown in the data shhet
5) Rset sets the DAC output current and is defined by the Rset equations in Table 6, Pin Function Descriptions. It's value range is more determined by the DAC output voltage range and DAC load resistance.
6) COMP pin is used for an internal reference amplifier. Nominally a X7R 10% ceramic should work. If you are using this device over an extended temperature range you should consider using a C0G (NPO) 10% cap since it has more temperature stability than X7R materials.
7) If you are not using sync then pull the sync pin high. The part will than generate Blank level to White level only as shown in Figure 5.
8) Rset in combination with the load resistors set the output voltage. Nominally the part is designed for 37.5 Ohm with the right Rset resistor. Note that the output current is based on the equations given in the data sheet
9) The Max output current are defined in the Reference Input equations with the caveat you do not exceed the absolute voltages and values.
10) From table 2, this is with Rset=560 Ohms and Rload = 37.5 Ohms. And as long as the output remains within the compliance voltage range.
11) Nominally this will be 37.5 Ohms
12) Yes, those are the correct formulas. Keep in mind the R & B DAC don not have to have current range for the sync pulse.
13) Pull down unused pixel bus pins. Pull up unused control pins, (sync, psave)