Hi Adrian,
I've now tried building the project on a different WinXP machine that only has Vivado 2013.4 installed. I still get a timing constraint error and the build doesn't seem to like having only 3GB RAM available, as I also get a JRE out of memory report.
Are you able to supply me with (or point me to) an SDK platform project for the ZedBoard FMCOMMS2 target complete with bitstream file? I don't need to change the FPGA design at all, I'm just looking to use the existing platform within my SDK projects.
Regards,
Chris