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Re: ADIS16485 - data ready indicator does not fit output rate

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Hmmm, it sounds like you are pretty close.  Here are a few comments:

  1. The RAM locations contain the "working memory," so the settings take effect, regardless of the flash memory contents
  2. Are you allowing for the Tstall time between each 16-bit sequence? 
  3. Are you raising the chip select line between each 16-bit sequence?  You don't necessarily have to do this but that has helped some  improve the noise immunity in their SPI link.
  4. Are you able to read back the DEC_RATE register value?
  5. What does the FNCTIO_CTRL register contain?
  6. What does the signal on DIO2 look like?  Can you post a picture of the scope shot?

I hope that this helps and look forward to your response.

Best,

NevadaMark


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