Installation of board support package
Hi,I'm a beginner of CCES, I tried to install the ADSP-21369 EZ-KIT BSP. However, when I wanted to make a new project, the "installed Add-ins" did not contain the BSP i just installed. Any solution to...
View ArticleRe: Using switches and LEDs AD-FMCOMMS2-EBZ kit.
Those ports which vivado indicates as missing are the ports of my own design . ( LEDs and switches are named differently from analog design in order to connect to my own logic that is chained to the...
View ArticleAD8307 - Will production continue?
Hello, A couple of questions on the AD8307.I'm using the AD8307 at very low frequency operation, and using the recommended configuration on page 22 of the manual (fig.44)it works well. 1 - On very low...
View ArticleADXL375 evaluation board's behavior at ODR=1600Hz,3200Hz
HiI’m evaluating with ADXL375 evaluation board.One axis data was strange in ODR=1600Hz or 3200Hz.I would like to know how to evaluate at high ODR by the evaluation board.It might be limit of evaluation...
View ArticleADG3304 logic level translator (Y->A), output is lower that Vcca supply voltage
Hello, I try to use ADG3304 to decrease high frequency signal (60 kHz) from 5 V (microcontroller) to 3.3 V. Y level is connected to 5V high frequency signal from Arduino with 50 Ohm resistor between...
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Re: hardware tools to program BF506
Hello Al,I think I will go for the ADI ICE for the moment as my software is designed with CCES.what model should I need to program the blackfin 506F in this case?Is ADZS-ICE-1000 good for this purpose?...
View ArticleRe: Can I use the IBIS(ADV7511W) under the condition 3.3V?
IBIS files are designed for those specific voltages. I you use something else then the models are not valid. Which signals are you applying 3.3V to instead of 1.8V?
View ArticleJESD204B configuration on DAQ2 reference design
Hello, I have an AD9680 evaluation board running with the DAQ2 FPGA reference design on the ZC706. For this evaluation board, I supply an external ADC sample clock and an external FPGA ref_clk and...
View ArticleRe: AD9747 doesn't work
Hi - Is sig.gif a signal measured at IOUTxP/IOUTxN? It looks good and so does everything else you've measured. Please send me your schematic. Thanks,Larry
View ArticleRe: About AD6655 output , interleaved ...
Hi JungMin, I believe this should be answered from you other thread at: https://ez.analog.com/message/174936#174936 Please let me know if you still have questions. Best regards, Jonathan
View ArticleRe: AD9656EBZ inputs sychronisation problem?
Hi Said, The HSC-ADC-EVALEZ has a FIFO depth of 256k. If you are capturing four channels at 64k samples each, that uses all 256k available. Going beyond 64k samples per channel exceeds the available...
View ArticleRe: AD9747 doesn't work
Hi Larry, Thanks for your response. Yes, sig1.gif shows the differential output with ~ 40R each to GND - just a 16bit up counter at 122Msps.The problem is, this only worked for the very first digital...
View ArticleRe: JESD204B configuration on DAQ2 reference design
Mike: You need to recompile the Xilinx IP -- that's how the Xilinx JESD204B IP works. It sets up it's PLLs at compile time. -Robin
View ArticleADV7343 Hatch Pattern
Hello,Can I obtain a picture or drawing the HD test pattern that the ADV7343 chip generates? Thanks, Ed
View ArticleAD5422 Vout is going to positive rail
HI, I am using a Freescale Micro to write SPI to the AD5422. When I initiate the following: SPI2_Send3Chars(0x56, 0x00, 0x01); //RESETSPI2_Send3Chars(0x55, 0x10, 0x00); //OUTPUT ENABLE, select...
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FMCDAQ2 and VC707
Hi Guys (rkutty), Never mind about working on the KCU105 HDL design for the FMCDAQ2, I've just received my VC707 board and I'm keen to get going with a 2014.4 design with the fmcdaq2. Seriously, great...
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Re: Using Serial Output Ports in 32 bit mode on ADAU1452
Hello Everyone, There is a preliminary version of SigmaStudio 3.12.1 Beta which includes support on the I/O blocks for 32-bit mode. The release is not publicly posted on the web yet. If you would...
View Articlejedec standard 204b, software decoder
Hi, MIT Haystack Observatory is building a new high speed data acquisition system for science that will be using as the ADC the AD960. Data is going to go from antenna to ADC to fpga to cycling DMA...
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Re: AD8421 input bias current
Hi Martin, There are a few things going on here. First of all, I checked this in our lab and my input current measurements agree with yours. I'll post my graph below for your reference. This is not...
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