Re: ADAU1361, PLL and Fs=32kHz

Alexander,

It's a little bit confusing, but just set up the PLL to output 1024 * 48 kHz = 49.152 MHz.

X = 2, N = 721, M = 1125, R = 3.

Then use the converter control registers to select 32 kHz instead of 48 kHz.

This gets you 32 kHz by using a clock divider instead of directly doing it with the PLL.