I have successfully been able to run the lastest No-OS code on the lastest fpgahdl_xilinx PL image for FMCOMMS2 AD9361 system. This latest version replaces the VDMA and DMA blocks with a axi-dmac block.
For the DAC path I would like the system to repetitively transmit a block of memory in a loop. This was easily accomplished in the previous VDMA architecture.
How can I achieve this behavior with the new AXI-DMAC block?
Is there a memory map or data sheet or other documentation you can publish to explain how this new block works?