Thanks for looking into this Kareem.
This design has been in production for 4 years and only now has given this problem, and only on one TEC driver out of 3 (there are 3 ADN TEC drivers on the problem board, but only the same 1 of 3 ever has the burned out FET.) So I need some guidance as to where to look given my actual schematic. Since all three TEC drivers have the same schematic, maybe there are some small details of layout I could look at. I will only be able to change the schematic if and when the artwork is open for a respin. Also suggestions for component value changes would be more immediately useful.
But your answer raises more questions:
1. You say I should move to a remote on/off when the power is stabilized. Why? Does the under-voltage lockout not work? Does the soft-start not work? I have 100nF on the SS pin. If I do remote on/off, do I connect it to SYNCI/SD (shutdown) or to SS/SB (standby)? Do I keep the soft-start cap? What is proposed mode of power-up failure? Can I put a scope probe somewhere and watch what happens at power-up?
2. Certainly I can move the linear FET capacitor to the downstream side of the sense resistor if we ever open up the artwork for a respin. But think for a moment: the sense resistor is 0.01ohm, the cap is 100nF for a time constant of 1ns. Can it really make a difference what side of the resistor the cap is? Come to think of it, the cap probably has an ESR greater the 0.01ohm. Perhaps some history as to why AD changed the recommendation would help.
3. Also, is there a spice model available for the ADN8831?
As to Harry's question about loop stability, I have no reason to suspect there are stability problems. The problem happened with two different laser vendors. But it is on my list to measure again the turn-on transient to see what kind of overshoot there is.
Regards,
G