After generate bitstream using the reference HDL from
AD-FMCOMMS1-EBZ HDL Reference Design [Analog Devices Wiki]
in Vivado, I created Zynq boot image in SDK. But during the boot, I got error messages in serial port
cf_axi_dds 74204000.cf-ad9122-core-lpc: Major version mismatch between PCORE and driver. Driver expected 6.00.a, PCORE reported 8.00.a
cf_axi_adc 79020000.cf-ad9643-core-lpc: Major version mismatch between PCORE and driver. Driver expected 6.00.a, PCORE reported 8.00.a
After I browsed through the discussions here, I found the hdl codes used in the reference are different from the pcore codes in
fpgahdl_xilinx/cf_lib/edk/pcores at master · analogdevicesinc/fpgahdl_xilinx · GitHub
What do I need to do to get the right version software/hareware so they match?
Thanks a lot!