For ex: Plz mention below.
3GHz Fsystem is used.
125 MHz is the SYNC Clk which has 8 ns per.
Suppose we are using async clock having 1 Hz / 1 s period & sendind Func and 32 bit datas.
In some cases when 1 s signalling is finished, SYNC_CLK can match up in time.
So, increasing the period has no meaning.