found that if DACCON(5) = 0 - working clocking from TIMER1
but in datasheet REV.B Page 54 says:
TABLE 52
| bit | Name | Description |
|---|---|---|
| 5 | CLK | 0: Update the DAC on the negative edge of UCLK. 1: Update the DAC on the negative edge of Timer1. This mode is ideally suited for waveform generation where the next value in the waveform is written to DACDAT at regular intervals of Timer1. |
Also,nowhere does it saythat after theDMAtransfer (CYCLE_CTRL = 001, BASIC),
the corresponding bit in the registermust be reinstalledDMAENSET.
wheredid I go wrong?
with best regards!